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Architect & Engineers Specification



The base unit digital processor shall be the core unit for AFC system. The system shall consist of at least two units. The first processor shall include the following fixed-architecture processing blocks: Input Mixer, Electric Microphone Rotator (EMR), Reflector with fluc-FIR, 8 band PEQ, and Notch filter. This unit shall have eight AFC microphone inputs, and flexible Auxiliary inputs up to 16 ch. The AFC function shall control the EMR, fluc-FIR, 8 band PEQ, and Notch filter. The second unit shall include fixed architecture processing blocks for a 4 x 16 Level-Delay Matrix and a 8 band PEQ for the 16 output channels. The LD Matrix shall allow routing from any input to any output. Level and Delay parameters shall be variable at each cross point. It shall be possible to individually mute all inputs and outputs. It shall be possible for the installer to expand the base unit’s total outputs to 16 output ports via two mini YGDAI slots. I/O cards for the YGDAI slots shall accept a variety of analog and digital I/O configurations (AES/EBU, ADAT, TASCAM). Total output channels shall be expandable up to 112 channels by cascading five processors.
AFC system on/off, up to 999 presets and continuous liveness control shall be retrievable via the dedicated control panel, ICP1, 16 GPI inputs and ouputs, or RS-232C serial ports.

With AD8HR and MY8-DA96, the digital processor shall have a maximum input level of +30 dBu and a maximum output level of +18 dBu. The frequency response shall be +1 to -3 dB between 20 Hz and 20 kHz. The dynamic Range shall be greater than 110 dB (typical, Gain +10 dB) and THD shall be less than 0.01 % at 1 kHz, +10 dBu. The input impedance shall be 3 k ohms. The output impedance shall be 150 ohms.
Inputs and outputs shall be balanced type on XLR connectors.




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